3D02200 - SEMI 3D22 - Guide on Measurements of Openings and Vias in Glass StdTpc-Documentation/Training This Specification provides a symbology

This Specification provides a symbology for marking hard surface reticle substrates within the edge exclusion area of the substrate

SEMI E109-0703 (technical revision)

due to embrittlement of PET) and external (e

本文書は，サプライヤまたはユーザが採用する危険源評価方法，または危険制御戦略（例えば，設計原理）に制限を加えることは意図しない。十分なレベルの保護が得られるなら，他のさまざまな方法を採用してもよい。

if it exists

3D02200 - SEMI 3D22 - Guide on Measurements of Openings and Vias in Glass StdTpc-Documentation/Training This Specification provides a symbology1 Purpose 1. 1 Through glass vias is an emerging technology in the semiconductor industry. Definitions for openings in glass have been described in SEMI 3D11, and a specification for glass as substrate for semiconductor applications with or without openings has been laid out in SEMI 3D16. However, there are few or no agreed upon test methods for measuring the physical and dimensional properties of through glass vias or other openings in glass or the